The core of Katu128 is its 16-round permutation. Most "Mid" tier implementations use a naive loop. To reach "Top," you must unroll the rounds completely and use bitslicing to process multiple 128-bit blocks in parallel. This transforms the data from a state array into registers, allowing SIMD instructions to chew through data four blocks at a time.
The bottleneck for most Katu128 designs is the MDS (Maximum Distance Separable) matrix multiplication. The top 1% of implementations use a circulant MDS matrix pre-computed via Karatsuba algorithm, reducing clock cycles from 12 to 7 per round.
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As of late 2025, the NIST Lightweight Cryptography project is actively considering Katu128 variant 2.0 for standardization alongside ASCON. The new "top" metric will likely include quantum circuit depth as a requirement—specifically, the ability to resist Grover's algorithm with fewer than 2^64 quantum gates.
Early access implementations suggest that reaching the post-quantum katu128 top will require doubling the internal state to 256 bits while maintaining the same 14-cycle latency. This is not impossible; it just demands better hardware-software co-design. The core of Katu128 is its 16-round permutation
A 2011 paper (“KATAN and KTANTAN — A Family of Small…” by De Cannière et al.) doesn’t have 128‑bit block.
Some later implementations extended it to 128‑bit block for research.
If you have the actual algorithm:
A proper guide would include: